[coreboot-gerrit] Patch set updated for coreboot: device/device: add dev_verify_resources

[Patrick Rudolph]

Patrick Rudolph ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15073

-gerrit

commit 9559c5e8cfe70a5e238247474c78c2daf4329b5e
Author: Patrick Rudolph 
Date:   Sun May 29 17:00:11 2016 +0200

device/device: add dev_verify_resources

Make sure that dynamic allocated resource fit into PCI mmio region.
    The caller has to provide the current lower PCI MMIO limit (TOLUD) and
    receives the lowest dynamic resource base address.

Can be used to print errors for PCI BARs that doesn't fit into
    PCI mmio region or can be used to find the required PCI mmio
    base address.

Required for dynamic PCI mmio size patches.

Change-Id: Icde74e4748e9b273882af3f5955b530c3567886b
    Signed-off-by: Patrick Rudolph 
---
 src/device/device.c         | 46 +++++++++++++++++++++++++++++++++++++++++++++
 src/include/device/device.h |  1 +
 2 files changed, 47 insertions(+)

diff --git a/src/device/device.c b/src/device/device.c
index 9ea32cc..240795f 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -1116,6 +1116,52 @@ void dev_enable(void)
 }

/**
+ * Find the smallest resource base address and verify all addresses.
+ *
+ * Starting at the root, walk the tree and verify all PCI devices by
+ * looking at the memory resource's base address.
+ * Print an error if the resource lays outside of the PCI decode range.
+ *
+ * @configured_mmio_base: Current PCI MMIO base used for verification
+ *
+ * Returns: The smallest PCI resource base address in use
+ */
+u32 dev_verify_resources(u32 configured_mmio_base)
+{
+	struct resource *res;
+	struct device *child, *dev;
+	u32 real_mmio_base = 0xffffffff;
+
+	/* Verify PCI MMIO configuration ... */
+	for (child = dev_root.link_list->children; child; child = child->sibling) {
+		if (!(child->path.type == DEVICE_PATH_DOMAIN) || !child->link_list)
+			continue;
+		for (dev = child->link_list->children; dev; dev = dev->sibling) {
+			if (!(dev->path.type == DEVICE_PATH_PCI))
+				continue;
+
+			for (res = dev->resource_list; res; res = res->next) {
+				/* Care about MMIO only */
+				if (!(res->flags & IORESOURCE_MEM))
+					continue;
+
+				if (res->base < configured_mmio_base) {
+					show_one_resource(BIOS_ERR, dev, res,
+									  " doesn't fit into PCI MMIO space.");
+				}
+				if (res->base < real_mmio_base)
+					real_mmio_base = res->base;
+			}
+		}
+	}
+
+	if (real_mmio_base == 0xffffffff)
+		return 0;
+
+	return real_mmio_base;
+}
+
+/**
  * Initialize a specific device.
  *
  * The parent should be initialized first to avoid having an ordering problem.
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 00ff3d9..8ccc421 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -169,6 +169,7 @@ void dev_initialize_chips(void);
 void dev_enumerate(void);
 void dev_configure(void);
 void dev_enable(void);
+u32 dev_verify_resources(u32);
 void dev_initialize(void);
 void dev_optimize(void);
 void dev_finalize(void);