Subrata Banik (subrata.banik@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18378
-gerrit
commit 159609d0af4b54d9b3b139789a1b348bb93822f7 Author: Subrata Banik subrata.banik@intel.com Date: Thu Feb 16 16:15:14 2017 +0530
soc/intel/common: Include common block directory [WIP]
Change-Id: Id6561033fc77c64c61ab0341337523e14f55dd80 Signed-off-by: Subrata Banik subrata.banik@intel.com --- src/soc/intel/common/Makefile.inc | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc index d6e1e75..b146efe 100644 --- a/src/soc/intel/common/Makefile.inc +++ b/src/soc/intel/common/Makefile.inc @@ -1,5 +1,8 @@ ifeq ($(CONFIG_SOC_INTEL_COMMON),y)
+subdirs-y += ../common/basecode +subdirs-y += ../common/block/* + bootblock-y += util.c
verstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c @@ -33,6 +36,9 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c
smm-$(CONFIG_SOC_INTEL_COMMON_SMI) += smihandler.c
+CPPFLAGS_common += -I$(src)/soc/intel/common/basecode/include/ +CPPFLAGS_common += -I$(src)/soc/intel/common/block/include/ + # Create and add the MRC cache to the cbfs image ifneq ($(CONFIG_CHROMEOS),y) $(obj)/mrc.cache: $(obj)/config.h