Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32882 )
Change subject: src/Kconfig: Move DRAM section to src/lib/Kconfig ......................................................................
src/Kconfig: Move DRAM section to src/lib/Kconfig
These Kconfigs are mostly used in src/lib/.
Change-Id: I7aa5436c6ff5fef53fde2081e902d793f3581c1e Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/32882 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/Kconfig M src/lib/Kconfig 2 files changed, 25 insertions(+), 25 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Furquan Shaikh: Looks good to me, approved
diff --git a/src/Kconfig b/src/Kconfig index 2c9dc4a..d30aa99 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1158,31 +1158,6 @@ implies configurability usually found on SoCs, particularly the ability to control internal pull resistors.
-config GENERIC_SPD_BIN - bool - help - If enabled, add support for adding spd.hex files in cbfs as spd.bin - and locating it runtime to load SPD. Additionally provide provision to - fetch SPD over SMBus. - -config DIMM_MAX - int - default 4 - help - Total number of memory DIMM slots available on motherboard. - It is multiplication of number of channel to number of DIMMs per - channel - -config DIMM_SPD_SIZE - int - default 256 - help - Total SPD size that will be used for DIMM. - Ex: DDR3 256, DDR4 512. - -config SPD_READ_BY_WORD - bool - config BOOTBLOCK_CUSTOM # To be selected by arch, SoC or mainboard if it does not want use the normal # src/lib/bootblock.c#main() C entry point. diff --git a/src/lib/Kconfig b/src/lib/Kconfig index 2f10c1c..cb1e4a5 100644 --- a/src/lib/Kconfig +++ b/src/lib/Kconfig @@ -30,6 +30,31 @@ Selected by features that require to parse and manipulate a flattened devicetree in ramstage.
+config GENERIC_SPD_BIN + bool + help + If enabled, add support for adding spd.hex files in cbfs as spd.bin + and locating it runtime to load SPD. Additionally provide provision to + fetch SPD over SMBus. + +config DIMM_MAX + int + default 4 + help + Total number of memory DIMM slots available on motherboard. + It is multiplication of number of channel to number of DIMMs per + channel + +config DIMM_SPD_SIZE + int + default 256 + help + Total SPD size that will be used for DIMM. + Ex: DDR3 256, DDR4 512. + +config SPD_READ_BY_WORD + bool + if RAMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO