Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32788 )
Change subject: soc/intel/common/block/gpio: Add gpio_pm_configure() function ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/32788/2/src/soc/intel/common/block/gpio/gpio... File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/#/c/32788/2/src/soc/intel/common/block/gpio/gpio... PS2, Line 625: gpio_pm_configure
I thought we need this solution for time being till cr50 FW actually updated with recommended IRQ pu […]
What I meant is: 1. GPIO common block code (gpio_pm_configure) can set the misccfg registers provided by the SoC i.e. we don't need to implement the policy here.
2. Each SoC can configure this based on either its own Kconfig or mainboard configuration i.e. currently cr50 is one example and it affects only google boards. There could be other devices which might require this functionality to be disabled or non-google boards wanting to implement different policies.
In these cases having a Kconfig variable selected by default by SoC doesn't seem like the right thing to do.