[coreboot-gerrit] Change in coreboot[master]: mb/purism/librem_mini: Adjust GPIO reset values

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47192 )

Change subject: mb/purism/librem_mini: Adjust GPIO reset values
......................................................................

mb/purism/librem_mini: Adjust GPIO reset values

Adjust reset values of some pads, using the original vendor firmware
as a reference.

Change-Id: I2d6a72d2e3597234c8fde86e028b033b3c8d36ae
Signed-off-by: Matt DeVillier 
---
M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c
1 file changed, 17 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/47192/1

diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c
index 9311ca0..ca91a13 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c
+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c
@@ -299,7 +299,7 @@

/* GPP_D15 - GPIO */
    /* DW0: 0x44000201, DW1: 0x00000000 */
-	PAD_CFG_GPO(GPP_D15, 1, DEEP),
+	PAD_CFG_GPO(GPP_D15, 1, PLTRST),

/* GPP_D16 - GPIO */
    /* DW0: 0x04000200, DW1: 0x00000000 */
@@ -533,51 +533,51 @@

/* GPD0 - BATLOW# */
    /* DW0: 0x04000702, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD0, NONE, DEEP, NF1),

/* GPD1 - ACPRESENT */
    /* DW0: 0x04000702, DW1: 0x00003c00 */
-	PAD_CFG_NF(GPD1, NATIVE, RSMRST, NF1),
+	PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),

/* GPD2 - LAN_WAKE# */
    /* DW0: 0x04000702, DW1: 0x00003c00 */
-	PAD_CFG_NF(GPD2, NATIVE, RSMRST, NF1),
+	PAD_CFG_NF(GPD2, NATIVE, DEEP, NF1),

/* GPD3 - PRWBTN# */
    /* DW0: 0x04000702, DW1: 0x00003000 */
-	PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),
+	PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),

/* GPD4 - SLP_S3# */
    /* DW0: 0x04000600, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD4, NONE, DEEP, NF1),

/* GPD5 - SLP_S4# */
    /* DW0: 0x04000600, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD5, NONE, DEEP, NF1),

/* GPD6 - SLP_A# */
    /* DW0: 0x04000600, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD6, NONE, DEEP, NF1),

/* GPD7 - GPIO */
    /* DW0: 0x04000200, DW1: 0x00000000 */
-	PAD_CFG_GPO(GPD7, 0, RSMRST),
+	PAD_CFG_GPO(GPD7, 0, DEEP),

/* GPD8 - SUSCLK */
    /* DW0: 0x04000700, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD8, NONE, DEEP, NF1),

/* GPD9 - SLP_WLAN# */
    /* DW0: 0x04000700, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD9, NONE, DEEP, NF1),

/* GPD10 - SLP_S5# */
    /* DW0: 0x04000600, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD10, NONE, DEEP, NF1),

/* GPD11 - LANPHYPC */
    /* DW0: 0x04000600, DW1: 0x00000000 */
-	PAD_CFG_NF(GPD11, NONE, RSMRST, NF1),
+	PAD_CFG_NF(GPD11, NONE, DEEP, NF1),

/* ------- GPIO Group GPP_C ------- */

@@ -627,7 +627,7 @@

/* GPP_C11 - GPIO */
    /* DW0: 0x84000201, DW1: 0x00000000 */
-	PAD_CFG_GPO(GPP_C11, 1, PLTRST),
+	PAD_CFG_GPO(GPP_C11, 1, DEEP),

/* GPP_C12 - UART1_RXD */
    /* DW0: 0x84000603, DW1: 0x00000000 */
@@ -635,15 +635,15 @@

/* GPP_C13 - UART1_TXD */
    /* DW0: 0x44000700, DW1: 0x00000000 */
-	PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C13, NONE, PLTRST, NF1),

/* GPP_C14 - UART1_RTS# */
    /* DW0: 0x44000700, DW1: 0x00000000 */
-	PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C14, NONE, PLTRST, NF1),

/* GPP_C15 - UART1_CTS# */
    /* DW0: 0x44000702, DW1: 0x00000000 */
-	PAD_CFG_NF(GPP_C15, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_C15, NONE, PLTRST, NF1),

/* GPP_C16 - I2C0_SDA */
    /* DW0: 0x84000402, DW1: 0x00000000 */