Name of user not set #1002476 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34686 )
Change subject: src: Kconfig: Update config for default path ......................................................................
src: Kconfig: Update config for default path
Change-Id: I35b0b08a13ad2deeb3e2efa146ab1916d5d23a14 Signed-off-by: Himanshu Sahdev himanshusah@hcl.com --- M src/cpu/intel/fsp_model_406dx/Kconfig M src/mainboard/adi/rcc-dff/Kconfig M src/mainboard/esd/atom15/Kconfig M src/mainboard/intel/bayleybay_fsp/Kconfig M src/mainboard/intel/minnowmax/Kconfig M src/mainboard/intel/mohonpeak/Kconfig M src/northbridge/intel/fsp_rangeley/fsp/Kconfig M src/soc/intel/fsp_baytrail/Kconfig M src/soc/intel/fsp_baytrail/fsp/Kconfig M src/southbridge/intel/fsp_rangeley/Kconfig 10 files changed, 9 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/34686/1
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 6bf8dc7..5c981f7 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -56,9 +56,4 @@ string default "cpu/intel/fsp_model_406dx/bootblock.c"
-#set up microcode for rangeley POSTGOLD4 release -config CPU_MICROCODE_HEADER_FILES - string - default "../intel/cpu/rangeley/microcode/microcode-m01406d000e.h ../intel/cpu/rangeley/microcode/microcode-m01406d8128.h" - endif #CPU_INTEL_FSP_MODEL_406DX diff --git a/src/mainboard/adi/rcc-dff/Kconfig b/src/mainboard/adi/rcc-dff/Kconfig index e7be77c..ef9d091 100644 --- a/src/mainboard/adi/rcc-dff/Kconfig +++ b/src/mainboard/adi/rcc-dff/Kconfig @@ -38,7 +38,7 @@
config FSP_FILE string - default "../intel/fsp/rangeley/FvFsp.bin" + default "3rdparty/fsp/RangeleyFspBinPkg/FspBin/RangeleyFSP.fd"
config CBFS_SIZE hex diff --git a/src/mainboard/esd/atom15/Kconfig b/src/mainboard/esd/atom15/Kconfig index 5726461..9e9769f 100644 --- a/src/mainboard/esd/atom15/Kconfig +++ b/src/mainboard/esd/atom15/Kconfig @@ -37,7 +37,7 @@
config FSP_FILE string - default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" + default "3rdparty/fsp/BayTrailFspBinPkg/FspBin/BAYTRAIL_FSP.fd"
config CBFS_SIZE hex diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig index 4a08fb1..833c7b2 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig @@ -39,8 +39,7 @@
config FSP_FILE string - default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP - default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" + default "3rdparty/fsp/BayTrailFspBinPkg/FspBin/BAYTRAIL_FSP.fd"
config CBFS_SIZE hex diff --git a/src/mainboard/intel/minnowmax/Kconfig b/src/mainboard/intel/minnowmax/Kconfig index ca24c92..f65a180 100644 --- a/src/mainboard/intel/minnowmax/Kconfig +++ b/src/mainboard/intel/minnowmax/Kconfig @@ -37,7 +37,7 @@
config FSP_FILE string - default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" + default "3rdparty/fsp/BayTrailFspBinPkg/FspBin/BAYTRAIL_FSP.fd"
config CBFS_SIZE hex diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index de91ca4..1b30f3d 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -38,7 +38,7 @@
config FSP_FILE string - default "../intel/fsp/rangeley/FvFsp.bin" + default "3rdparty/fsp/RangeleyFspBinPkg/FspBin/RangeleyFSP.fd"
config CBFS_SIZE hex diff --git a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig index 67ed66b..1c7fb7c 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig +++ b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig @@ -22,7 +22,7 @@
config FSP_FILE string - default "../intel/fsp/rangeley/FvFsp.bin" + default "3rdparty/fsp/RangeleyFspBinPkg/FspBin/RangeleyFSP.fd" help The path and filename of the Intel FSP binary for this platform.
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 072df29..64b4bab 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -97,11 +97,7 @@
config VGA_BIOS_FILE string - default "../intel/cpu/baytrail/vbios/Vga.dat" if VGA_BIOS - -config CPU_MICROCODE_HEADER_FILES - string - default "../intel/cpu/baytrail/microcode/M0130673322.h ../intel/cpu/baytrail/microcode/M0130679901.h ../intel/cpu/baytrail/microcode/M0230672228.h" + default "3rdparty/fsp/BayTrailFspBinPkg/Vbios/Vga.dat" if VGA_BIOS
## Baytrail Specific FSP Kconfig source src/soc/intel/fsp_baytrail/fsp/Kconfig diff --git a/src/soc/intel/fsp_baytrail/fsp/Kconfig b/src/soc/intel/fsp_baytrail/fsp/Kconfig index 3fe358e..b733268 100644 --- a/src/soc/intel/fsp_baytrail/fsp/Kconfig +++ b/src/soc/intel/fsp_baytrail/fsp/Kconfig @@ -21,7 +21,7 @@
config FSP_FILE string - default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" + default "3rdparty/fsp/BayTrailFspBinPkg/FspBin/BAYTRAIL_FSP.fd" help The path and filename of the Intel FSP binary for this platform.
diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig index 4526cb3..90013de 100644 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ b/src/southbridge/intel/fsp_rangeley/Kconfig @@ -47,12 +47,5 @@ config HPET_MIN_TICKS hex default 0x80 - -config IFD_BIN_PATH - string - depends on HAVE_IFD_BIN - default "../intel/mainboard/intel/rangeley" - help - The path and filename to the descriptor.bin file. - + endif