[coreboot-gerrit] Change in coreboot[master]: [TESTME]nb/intel/pineview: Use regular udelay over hpet_udelay

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35759 )

Change subject: [TESTME]nb/intel/pineview: Use regular udelay over hpet_udelay
......................................................................

[TESTME]nb/intel/pineview: Use regular udelay over hpet_udelay

There is no need for high precision udelays here.

Change-Id: I619e2f215f94858e53ac1369b2f6d995303aa3cf
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/pineview/raminit.c
1 file changed, 7 insertions(+), 47 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/35759/1

diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index 7f59d91..db13b2a 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -547,20 +547,6 @@
    }
 }

-#define HPET_BASE 0xfed00000
-#define HPET32(x) *((volatile u32 *)(HPET_BASE + x))
-static void enable_hpet(void)
-{
-	u32 reg32;
-	reg32 = RCBA32(HPTC);
-	reg32 &= ~0x3;
-	reg32 |= (1 << 7);
-	RCBA32(HPTC) = reg32;
-	/* On NM10 this only works if read back */
-	RCBA32(HPTC);
-	HPET32(0x10) = HPET32(0x10) | 1;
-}
-
 static void sdram_clk_crossing(struct sysinfo *s)
 {
    u8 clk_idx, fsb_idx;
@@ -1525,29 +1511,6 @@
    pci_write_config32(PCI_DEV(0, 0, 0), 0xac, tsegmb[s->dimm_config[0]]);
 }

-#if 1
-static void hpet_udelay(u32 del)
-{
-	u32 start, finish, now;
-
-	del *= 15; /* now in usec */
-
-	start = HPET32(0xf0);
-	finish = start + del;
-	while (1) {
-		now = HPET32(0xf0);
-		if (finish > start) {
-			if (now >= finish)
-				break;
-		} else {
-			if ((now < start) && (now >= finish)) {
-				break;
-			}
-		}
-	}
-}
-#endif
-
 static u8 sdram_checkrcompoverride(void)
 {
    u32 xcomp;
@@ -1588,7 +1551,7 @@
    MCHBAR8(0x130) = MCHBAR8(0x130) & ~(1 << 7);
    for (i = 0; i < 3; i++) {
    	MCHBAR8(0x130) = MCHBAR8(0x130) | 1;
-		hpet_udelay(1000);
+		udelay(1000);
    	while ((MCHBAR8(0x130) & 0x1) != 0);
    	ok |= sdram_checkrcompoverride();
    }
@@ -1600,7 +1563,7 @@
    	MCHBAR32(0x140) = reg32a;
    }
    MCHBAR8(0x130) = MCHBAR8(0x130) | 1;
-	hpet_udelay(1000);
+	udelay(1000);
    while ((MCHBAR8(0x130) & 0x1) != 0);
 }

@@ -1614,7 +1577,7 @@
    MCHBAR8(0x271) = (MCHBAR8(0x271) & ~0x3e) | jmode;
    read32((void *)reg32);
    barrier();
-	hpet_udelay(1); // 1us
+	udelay(1); // 1us
 }

static void sdram_zqcl(struct sysinfo *s)
@@ -1660,7 +1623,7 @@
    	rttnom |= (1 << 6);
    }

-	hpet_udelay(200); // 200us
+	udelay(200); // 200us
    reg16 = 0;
    FOR_EACH_POPULATED_RANK(s->dimms, ch, r) {
    	for (i = 0; i < 12; i++) {
@@ -1815,13 +1778,13 @@
    u8 dqsmatches = 1;
    while (count--) {
    	MCHBAR8(0x5d8) = MCHBAR8(0x5d8) & ~0x2;
-		hpet_udelay(1);
+		udelay(1);
    	MCHBAR8(0x5d8) = MCHBAR8(0x5d8) | 0x2;
-		hpet_udelay(1);
+		udelay(1);
    	barrier();
    	read32((void *)strobeaddr);
    	barrier();
-		hpet_udelay(1);
+		udelay(1);

if (((MCHBAR8(dqshighaddr) & 0x40) >> 6) != highlow) {
    		dqsmatches = 0;
@@ -2515,9 +2478,6 @@
    /* Determine smallest common tRAS, tRP, tRCD, etc */
    sdram_detect_smallest_params(&si);

-	/* Enable HPET */
-	enable_hpet();
-
    MCHBAR16(0xc1c) = MCHBAR16(0xc1c) | (1 << 15);

sdram_clk_crossing(&si);