Attention is currently required from: Shelley Chen, Ravi kumar, Martin Roth, Ravi Kumar Bokka. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45205 )
Change subject: sc7280: Provide initial SoC support ......................................................................
Patch Set 24:
(6 comments)
File 3rdparty/qc_blobs:
https://review.coreboot.org/c/coreboot/+/45205/comment/93d28be6_b0737b41 PS15, Line 1: Subproject commit 355fff30cbb98882664743ef62a65cbaa958e715
Ravi, you need to resolve this before any of your patches can land in coreboot.org.
So just to make things easier, the way you fix this is:
1. Go into your coreboot Git checkout 2. Make sure you have this patch on top (e.g. via rebase --interactive or something) 3. `cd 3rdparty/qc_blobs` 4. `git checkout 6b7fe498eb782b` 5. `cd ../..` 6. `git add 3rdparty/qc_blobs` 7. `git commit --amend`
That should bring you back to the old qc_blobs version. Submodule checkouts are basically tracked like normal files in git. If you need a submodule checkout to some internal unreleased qc_blobs version to test this, put that in a separate HACK patch at the end of this patch train for now.
File src/soc/qualcomm/sc7280/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/45205/comment/43e5c281_a6d7a27a PS24, Line 12: verstage-y += spi.c nit: btw, our build system now supports `all-y += ...` as a shorthand for adding files like this to every stage
File src/soc/qualcomm/sc7280/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/45205/comment/5ddc3a58_d15e2ea3 PS24, Line 8: #define SSRAM_END(addr) SYMBOL(essram, addr) This was recently changed, please use REGION_START() and REGION_END() for these. See https://review.coreboot.org/c/coreboot/+/49332/13/src/soc/qualcomm/sc7180/me...
https://review.coreboot.org/c/coreboot/+/45205/comment/72e24b5e_1710e4ff PS24, Line 42: FMAP_CACHE(0x1485B400, 2K) Please fit a CBFS_MCACHE() area of at least 8K in here somewhere, that was also a recent addition. See https://review.coreboot.org/c/coreboot/+/38424/24/src/soc/qualcomm/sc7180/me...
File src/soc/qualcomm/sc7280/qclib.c:
https://review.coreboot.org/c/coreboot/+/45205/comment/61133651_ebc691a7 PS24, Line 12: ssize_t ssize; We've had typo errors with stuff like this before... please just use a single ssize_t variable for all of these (the cbfs_boot_load_file() results will not overflow 63 bits).
https://review.coreboot.org/c/coreboot/+/45205/comment/d4615677_2607a6ce PS24, Line 15: size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/pmiccfg", This API was recently renamed and is now called cbfs_load() with slightly simplified signature (see https://review.coreboot.org/c/coreboot/+/39304/18/src/soc/qualcomm/sc7180/qc...).
Please rebase this patch train onto the newest master and see if you have more issues like that.