[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support

the following patch was just integrated into master:
commit 17335fab175ed1a16f61729b03c1fbeeec366f37
Author: Rizwan Qureshi 
Date:   Sat Jan 14 06:08:21 2017 +0530

soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support

Add APIs and required parameters for creating Maxim 98927
    and Realtek 5336 SSP endpoints in NHLT table.

BUG=chrome-os-partner:62051
    BRANCH=None
    TEST=check that NHLT table created is created properly

Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4
    Signed-off-by: Rizwan Qureshi 
    Signed-off-by: Naresh G Solanki 
    Signed-off-by: M Naveen 
    Reviewed-on: https://review.coreboot.org/18213
    Tested-by: build bot (Jenkins)
    Reviewed-by: Furquan Shaikh

See https://review.coreboot.org/18213 for details.

-gerrit