[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel: Add definition of D0 stepping for TigerLake Halo

[Alicja Michalska (Code Review)]

Attention is currently required from: Nick Vaccaro, Subrata Banik.

Alicja Michalska has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80849?usp=email )

Change subject: soc/intel: Add definition of D0 stepping for TigerLake Halo
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soc/intel: Add definition of D0 stepping for TigerLake Halo

Change-Id: Ic080ffe7912ad71c77af09d2f3d1d9b08d9ffac8
Signed-off-by: Alicja Michalska 
---
M src/include/cpu/intel/cpu_ids.h
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
3 files changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/80849/1

diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index d74cf1e..ddb4e54 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -46,6 +46,7 @@
 #define CPUID_COMETLAKE_H_S_10_2_Q0	0xa0655
 #define CPUID_TIGERLAKE_A0		0x806c0
 #define CPUID_TIGERLAKE_B0		0x806c1
+#define CPUID_TIGERLAKE_P0		0x806d0
 #define CPUID_TIGERLAKE_R0		0x806d1
 #define CPUID_SAPPHIRERAPIDS_SP_A	0x806f0
 #define CPUID_SAPPHIRERAPIDS_SP_B	0x806f1
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index bd43545..3cff621 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -71,6 +71,7 @@
    { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0, CPUID_EXACT_MATCH_MASK },
    { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0, CPUID_EXACT_MATCH_MASK },
    { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0, CPUID_EXACT_MATCH_MASK },
+	{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_P0, CPUID_EXACT_MATCH_MASK },
    { X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0, CPUID_EXACT_MATCH_MASK },
    { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK },
    { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK },
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index 1ecaf77..137e2d5 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -25,6 +25,7 @@
 } cpu_table[] = {
    { CPUID_TIGERLAKE_A0, "Tigerlake A0" },
    { CPUID_TIGERLAKE_B0, "Tigerlake B0" },
+	{ CPUID_TIGERLAKE_B0, "Tigerlake P0" },
    { CPUID_TIGERLAKE_R0, "Tigerlake R0" },
 };