[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/cannonlake: Configure top swap based on ucode version

[Varshit B Pandya (Code Review)]

Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34656 )

Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version
......................................................................

src/soc/intel/cannonlake: Configure top swap based on ucode version

Disable top swap if ucode version is 0(invalid)

Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21
---
M src/soc/intel/cannonlake/bootblock/cpu.c
1 file changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/1

diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c
index f60f319..c96bca8 100644
--- a/src/soc/intel/cannonlake/bootblock/cpu.c
+++ b/src/soc/intel/cannonlake/bootblock/cpu.c
@@ -14,14 +14,39 @@
  * GNU General Public License for more details.
  */

+#include <arch/cpu.h>
+#include <cpu/x86/msr.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
+#include <intelblocks/rtc.h>
+#include <reset.h>
 #include <soc/bootblock.h>

+#define BIOS_SIGN_ID    0x8B
+
+static void check_ucode_and_update_top_swap(void)
+{
+	/* Code to check the MCU version and Update TS */
+	msr_t microcode_ver;
+	unsigned int cpu_id;
+	microcode_ver.lo = 0;
+	microcode_ver.hi = 0;
+	wrmsr(BIOS_SIGN_ID, microcode_ver);
+	cpu_id = cpu_get_cpuid();
+	microcode_ver = rdmsr(BIOS_SIGN_ID);
+	if (microcode_ver.hi == 0x0) {
+		configure_rtc_buc_top_swap(TS_DISABLE);
+		do_board_reset();
+	}
+}
+
 void bootblock_cpu_init(void)
 {
    /* Temporarily cache the memory-mapped boot media. */
    if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) &&
    	CONFIG(BOOT_DEVICE_SPI_FLASH))
    	fast_spi_cache_bios_region();
+	
+	/* Code to check the MCU version and Update TS */
+	check_ucode_and_update_top_swap();
 }