Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38504
to look at the new patch set (#2).
Change subject: soc/intel/tigerlake: Enable SATA ......................................................................
soc/intel/tigerlake: Enable SATA
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board with SATA memory
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I9350d71d76cd3d449fd959b5398d5ac653bc459e --- M src/soc/intel/tigerlake/fsp_params_tgl.c 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/38504/2