[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update PMC Register Base and platform check for JSP

[Usha P (Code Review)]

Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38704 )

Change subject: soc/intel/tigerlake: Update PMC Register Base and platform check for JSP
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38704/2/src/soc/intel/tigerlake/esp... 
File src/soc/intel/tigerlake/espi.c:

https://review.coreboot.org/c/coreboot/+/38704/2/src/soc/intel/tigerlake/esp... 
PS2, Line 86: 0x4d
> Why was 0x38 removed? I see at least on JSL ESPI ID which is 0x3887 here: https://review.coreboot. […]

We need to update the JSL device id's into pch_ids.h, here is the crosbug https://partnerissuetracker.corp.google.com/issues/149185282 to track on it.

Since there are too many devices for comparison, we are using hi_byte for this purpose.