Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47448 )
Change subject: soc/intel/xeon_sp: Lock down DMI3 PCI registers
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Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47448/10/src/soc/intel/xeon_sp/unco...
File src/soc/intel/xeon_sp/uncore.c:
https://review.coreboot.org/c/coreboot/+/47448/10/src/soc/intel/xeon_sp/unco...
PS10, Line 349: uint16_t pci_err_inj_dis = pci_read_config16(dev, ERRINJCON);
: if (!(pci_err_inj_dis & 1))
: pci_update_config16(dev, ERRINJCON, 0xfffe, 1);
:
: uint32_t dmircbar = pci_read_config32(dev, DMIRCBAR);
: if (!(dmircbar & 1))
: pci_update_config32(dev, DMIRCBAR, 0xfffe, 1);
OK, I think I know what you want to do: […]
Done
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Gerrit-Project: coreboot
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