[coreboot-gerrit] Change in coreboot[master]: soc/mediatek: Add PCIe support

[Jianjun Wang (Code Review)]

Attention is currently required from: Hung-Te Lin, Arthur Heymans, Shelley Chen, Furquan Shaikh, Paul Menzel, Angel Pons, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 )

Change subject: soc/mediatek: Add PCIe support
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Patch Set 10:

(1 comment)

File src/soc/mediatek/common/pcie.c:

https://review.coreboot.org/c/coreboot/+/56791/comment/b64e361e_47db87c0 
PS9, Line 108: pcie_ctrl->base + PCIE_CFG_OFFSET_ADDR;
             : }
> The "void pointer arithmetic" Arthur is referring to is the sum, because `pcie_ctrl->base` is of typ […]

Thanks for your suggestions.
But I found the 'read32p' and 'write32p' function is defined in 'src/arch/x86/include/arch/mmio.h', and it cannot be used in ARM platform. I'd like to move these functions to 'src/include/device/mmio.h', what do you think? Do you have any suggestions?