Nico Huber has uploaded this change for review. ( https://review.coreboot.org/29669
Change subject: cpu/intel/sandybridge: Add `hyper_threading` option ......................................................................
cpu/intel/sandybridge: Add `hyper_threading` option
More and more people request an option to disable HT. To implement that we have to toggle a bit in a `soft reset` register in the PCH that can override certain default settings of the CPU when it comes out of reset.
The `soft reset` register is already used for other settings. So we have to take care that all settings are gathered before we issue the reset.
Note, the current code using `soft reset` for flex ratio selection seems incomplete.
Change-Id: I2b73e32ff5af8ea64a47e8aa706e27648aaf0993 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/cpu/intel/model_206ax/bootblock.c M src/mainboard/lenovo/t430/cmos.layout M src/southbridge/intel/bd82x6x/pch.h 3 files changed, 46 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/29669/1
diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c index 670b097..929c6dc 100644 --- a/src/cpu/intel/model_206ax/bootblock.c +++ b/src/cpu/intel/model_206ax/bootblock.c @@ -19,6 +19,8 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <arch/io.h> +#include <option_table.h> +#include <pc80/mc146818rtc.h> #include <halt.h>
#include <cpu/intel/microcode/microcode.c> @@ -61,34 +63,29 @@ wrmsr(MTRR_DEF_TYPE_MSR, msr); }
-static void set_flex_ratio_to_tdp_nominal(void) +static u32 set_flex_ratio_to_tdp_nominal(u32 soft_reset) { msr_t flex_ratio, msr; - u32 soft_reset; u8 nominal_ratio;
/* Minimum CPU revision for configurable TDP support */ if (cpuid_eax(1) < IVB_CONFIG_TDP_MIN_CPUID) - return; + return soft_reset;
/* Check for Flex Ratio support */ flex_ratio = rdmsr(MSR_FLEX_RATIO); if (!(flex_ratio.lo & FLEX_RATIO_EN)) - return; + return soft_reset;
/* Check for >0 configurable TDPs */ msr = rdmsr(MSR_PLATFORM_INFO); if (((msr.hi >> 1) & 3) == 0) - return; + return soft_reset;
/* Use nominal TDP ratio for flex ratio */ msr = rdmsr(MSR_CONFIG_TDP_NOMINAL); nominal_ratio = msr.lo & 0xff;
- /* See if flex ratio is already set to nominal TDP ratio */ - if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio) - return; - /* Set flex ratio to nominal TDP ratio */ flex_ratio.lo &= ~0xff00; flex_ratio.lo |= nominal_ratio << 8; @@ -97,24 +94,52 @@
/* Set flex ratio in soft reset data register bits 11:6. * RCBA region is enabled in southbridge bootblock */ - soft_reset = RCBA32(SOFT_RESET_DATA); soft_reset &= ~(0x3f << 6); soft_reset |= (nominal_ratio & 0x3f) << 6; - RCBA32(SOFT_RESET_DATA) = soft_reset; + return soft_reset; +}
- /* Set soft reset control to use register value */ +static u32 set_hyperthreading_option(u32 soft_reset) +{ + int ht_requested; + + ht_requested = read_option(hyper_threading, 1); + + soft_reset &= ~1; + soft_reset |= !ht_requested; /* Bit 0 is ht disable */ + return soft_reset; +} + +static void soft_reset_settings(void) +{ + int need_reset; + u32 soft_reset; + + soft_reset = RCBA32(SOFT_RESET_DATA); + soft_reset = set_flex_ratio_to_tdp_nominal(soft_reset); + soft_reset = set_hyperthreading_option(soft_reset); + + /* Check if we didn't already request these settings */ + need_reset = !(RCBA32(SOFT_RESET_CTRL) & 1) || + RCBA32(SOFT_RESET_DATA) != soft_reset; + + /* Set current requests */ + RCBA32(SOFT_RESET_DATA) = soft_reset; + /* Use them instead of defaults */ RCBA32_OR(SOFT_RESET_CTRL, 1);
- /* Issue warm reset, will be "CPU only" due to soft reset data */ - outb(0x0, 0xcf9); - outb(0x6, 0xcf9); - halt(); + if (need_reset) { + outb(0x2, 0xcf9); + outb(0x6, 0xcf9); + halt(); + } else { + RCBA32_OR(SOFT_RESET_LOCK, 1); + } }
static void bootblock_cpu_init(void) { - /* Set flex ratio and reset if needed */ - set_flex_ratio_to_tdp_nominal(); + soft_reset_settings(); enable_rom_caching(); intel_update_microcode_from_cbfs(); } diff --git a/src/mainboard/lenovo/t430/cmos.layout b/src/mainboard/lenovo/t430/cmos.layout index 1b50e7f..9517482 100644 --- a/src/mainboard/lenovo/t430/cmos.layout +++ b/src/mainboard/lenovo/t430/cmos.layout @@ -72,7 +72,8 @@ 422 2 e 10 backlight
# coreboot config options: cpu -#424 8 r 0 unused +424 1 e 1 hyper_threading +#425 7 r 0 unused
# coreboot config options: northbridge 432 3 e 11 gfx_uma_size diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index bb0d5c4..7aab77a 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -391,6 +391,7 @@ #define D22IR 0x315c /* 16bit */ #define D20IR 0x3160 /* 16bit */ #define OIC 0x31fe /* 16bit */ +#define SOFT_RESET_LOCK 0x38f0 #define SOFT_RESET_CTRL 0x38f4 #define SOFT_RESET_DATA 0x38f8