[coreboot-gerrit] Change in coreboot[master]: soc/amd/common/block/acpimmio: fix the ACPIMMIO decode enable function

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37178 )

Change subject: soc/amd/common/block/acpimmio: fix the ACPIMMIO decode enable function
......................................................................

soc/amd/common/block/acpimmio: fix the ACPIMMIO decode enable function

According to BKDG's for families 15h and 16h the ACPI MMIO decode enable
bit is the second LSB not the first LSB.

Signed-off-by: Michał Żygowski 
Change-Id: Iaa31abc3dbdf77d8513fa83c7415b9a1b7fd266f
---
M src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
1 file changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/37178/1

diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
index 755af52..d636432 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
@@ -28,7 +28,8 @@
  * newer method.
  */
 #define ACPIMMIO_DECODE_REGISTER 0x4
-#define   ACPIMMIO_DECODE_EN		BIT(0)
+#define   BIOSRAM_DECODE_EN		BIT(0)
+#define   ACPIMMIO_DECODE_EN		BIT(1)

/* MMIO register blocks are at fixed offsets from 0xfed80000 and are enabled
  * in PMx24[1] (older implementations) and PMx04[1] (newer implementations).