[coreboot-gerrit] Change in ...coreboot[master]: cpu/intel/gen1/smmrelocate: Check for sanity on SMRR

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30709

Change subject: cpu/intel/gen1/smmrelocate: Check for sanity on SMRR
......................................................................

cpu/intel/gen1/smmrelocate: Check for sanity on SMRR

This happens when TSEG is found to be unaligned.

Change-Id: Id0c078a880dddb55857af2bca233cf4dee91250a
Signed-off-by: Arthur Heymans 
---
M src/cpu/intel/smm/gen1/smmrelocate.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/30709/1

diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 426eae5..46f6f93 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -60,6 +60,9 @@
 {
    struct cpuinfo_x86 c;

+	if (relo_params->smrr_base.lo == 0)
+		return;
+
    printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
           relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
    /* Both model_6fx and model_1067x SMRR function slightly differently