[coreboot-gerrit] Change in coreboot[master]: lib/spd_bin: Cleanup spd_get_banks

[EricR Lai (Code Review)]

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39496 )

Change subject: lib/spd_bin: Cleanup spd_get_banks
......................................................................

lib/spd_bin: Cleanup spd_get_banks

Remove the switch case in spd_get_banks. The new DDR type still adapt
DDR4 attributes.

Signed-off-by: Eric Lai 
Change-Id: Icfaefd1856d2350c6e5a91d233ccdb10d5259391
---
M src/lib/spd_bin.c
1 file changed, 6 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/39496/1

diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 625eec8..1300ac8 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -78,22 +78,15 @@
    static const int ddr3_banks[4] = { 8, 16, 32, 64 };
    static const int ddr4_banks[10] = { 4, 8, -1, -1, 8, 16, -1, -1, 16, 32 };
    int index = (spd[SPD_DENSITY_BANKS] >> 4) & 0xf;
-	switch (dram_type) {
-	/* DDR3 and LPDDR3_Intel have the same bank definition */
-	case SPD_DRAM_DDR3:
-	case SPD_DRAM_LPDDR3_INTEL:
-		if (index >= ARRAY_SIZE(ddr3_banks))
-			return -1;
-		return ddr3_banks[index];
-	/* LPDDR3, LPDDR4 and DDR4 have the same bank definition */
-	case SPD_DRAM_LPDDR3_JEDEC:
-	case SPD_DRAM_DDR4:
-	case SPD_DRAM_LPDDR4:
+
+	if (use_ddr4_params(dram_type)) {
    	if (index >= ARRAY_SIZE(ddr4_banks))
    		return -1;
    	return ddr4_banks[index];
-	default:
-		return -1;
+	} else {
+		if (index >= ARRAY_SIZE(ddr3_banks))
+			return -1;
+		return ddr3_banks[index];
    }
 }