Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42154 )
Change subject: sb/intel/lynxpoint: Use PCI bitwise ops
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Patch Set 13: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/42154/13/src/southbridge/intel/lynx...
File src/southbridge/intel/lynxpoint/pcie.c:
https://review.coreboot.org/c/coreboot/+/42154/13/src/southbridge/intel/lynx...
PS13, Line 250: /* FIXME: Are we supposed to update this register with a constant boolean? */
No, the problem on this line is the `1 < 5` thing. […]
Whoa, good eye, my brain definitely put the extra '<' in there...
https://review.coreboot.org/c/coreboot/+/42154/13/src/southbridge/intel/lynx...
PS13, Line 619: pci_update_config32
It won't be reproducible (the binary will change). pci_write_config32() won't perform any read […]
Gotcha.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I27d6aaa59e12a337f80a6d3387cc9c8ae5949384
Gerrit-Change-Number: 42154
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