Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37115 )
Change subject: sb/intel/bd82x6x: Support ME Soft Temporary Disable Mode ......................................................................
Patch Set 24:
(4 comments)
https://review.coreboot.org/c/coreboot/+/37115/23//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37115/23//COMMIT_MSG@74 PS23, Line 74: CB:42019
I rebased the change, it needs reviewers
Ack
https://review.coreboot.org/c/coreboot/+/37115/19/src/southbridge/intel/bd82... File src/southbridge/intel/bd82x6x/early_me.c:
https://review.coreboot.org/c/coreboot/+/37115/19/src/southbridge/intel/bd82... PS19, Line 94: set_global_reset
This old version is for romstage only and the version moved to me_common.c is for both. […]
marking as resolved due to non response
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me_8.x.c:
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 523: struct device *lpc = pcidev_on_root(0x1f, 0); : u32 etr3 = pci_read_config32(lpc, ETR3)
Not sure. […]
i hope it's not, marking as resolved.
https://review.coreboot.org/c/coreboot/+/37115/19/src/southbridge/intel/bd82... File src/southbridge/intel/bd82x6x/me_8.x.c:
https://review.coreboot.org/c/coreboot/+/37115/19/src/southbridge/intel/bd82... PS19, Line 764: me_state_prev
What happens on CMOS reset? […]
fixed