[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/adl: Handle critical low battery early in romstage

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Subrata Banik.

Karthik Ramasubramanian has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86227?usp=email )

Change subject: soc/intel/adl: Handle critical low battery early in romstage
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Patch Set 3:

(1 comment)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/86227/comment/ba9fe665_411e380d?usp... :
PS3, Line 421: if (CONFIG(EC_GOOGLE_CHROMEEC) && google_chromeec_is_below_critical_threshold()) {
I would recommend to decouple ChromeEC and SoC code as much as possible. Probably introduce a weak platform_early_shutdown callback and then override it in vendorcode/google/chromeos?