[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cannonlake,icelake}: Do not define PCH_DEV_PMC in ramstage

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34120 )

Change subject: soc/intel/{cannonlake,icelake}: Do not define PCH_DEV_PMC in ramstage
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34120/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/34120/2//COMMIT_MSG@10 
PS2, Line 10: This device gets hidden from PCI bus
            : in FSP-S
> > "its been recommended" -- by whom? […]

Uh... I  found CB:22556

I am surprised Aaron approved that the resource is now being accounted for on a different device. Like our resource allocator was not buggy and complex enough with quirks like these :(