John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31917 )
Change subject: soc/intel/cnl: Generate DMAR ACPI table
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Patch Set 16:
(1 comment)
https://review.coreboot.org/#/c/31917/15/src/soc/intel/cannonlake/acpi.c
File src/soc/intel/cannonlake/acpi.c:
https://review.coreboot.org/#/c/31917/15/src/soc/intel/cannonlake/acpi.c@355
PS15, Line 355: !(MCHBAR32(VTVC0BAR) & VTBAR_ENABLED))
The early code always sets this bit if the chipset is capable. […]
Just added additional comments. Yes, VtdDisable (value 0) will be passed from coreboot to fsp once FSP upd change has been integrated to https://github.com/intelfsp/fsp.
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