Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Mark Hasemeyer, Matt DeVillier, Tim Van Patten.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79155?usp=email )
Change subject: soc/amd/common/psp_verstage: Make SPI ROM mapping configurable ......................................................................
Patch Set 2:
(4 comments)
File src/soc/amd/common/psp_verstage/Kconfig:
https://review.coreboot.org/c/coreboot/+/79155/comment/995cc400_023b688e : PS1, Line 49: default y if SOC_AMD_CEZANNE
Have you tried any earlier boards as well (e.g., Grunt and Zork)? […]
Done. Tested on Zork. PSP verstage is not enabled in Grunt and hence it does not apply there.
File src/soc/amd/common/psp_verstage/boot_dev.c:
https://review.coreboot.org/c/coreboot/+/79155/comment/59610f0b_72b38eb5 : PS1, Line 40: uint32_t ret;
This can be moved inside the `CONFIG` conditional block.
Acknowledged. But I updated the condition logic to check for true to be consistent with the rest of the code.
File src/soc/amd/common/psp_verstage/fch.c:
https://review.coreboot.org/c/coreboot/+/79155/comment/fde98e26_3d621c7f : PS1, Line 101: if (!CONFIG(PSP_VERSTAGE_MAP_ENTIRE_SPIROM)) : return spi.SpiBiosSmnBase; : : if (spi.SpiBiosSmnBase != 0) : if (svc_map_spi_rom(spi.SpiBiosSmnBase, CONFIG_ROM_SIZE, (void **)&addr)) : printk(BIOS_DEBUG, "Error mapping SPI ROM to address.\n"); : : return addr;
Positive logic is easier to read, so I think this should be inverted: […]
Done
File src/soc/amd/common/psp_verstage/psp_verstage.c:
https://review.coreboot.org/c/coreboot/+/79155/comment/a25b28d3_e55fff63 : PS1, Line 355: boot_dev_base = rdev_mmap_full(boot_device_ro());
Missing the `post_code(POSTCODE_UNMAP_SPI_ROM);` line as well: […]
Done.