Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44220 )
Change subject: cpu/intel/socket_p/Makefile.inc: Sort entries ......................................................................
cpu/intel/socket_p/Makefile.inc: Sort entries
Group lines by stages, then subdirs, then microcode. Within groups, order in ascending count of `../` in prefix and then alphabetically. Group CPU models separately from other subdirs, as they are special.
Tested with BUILD_TIMELESS=1, Lenovo ThinkPad T400 remains identical.
Change-Id: I368d1bca59cc7c2ef5728a66ec9b59f9f8190355 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/intel/socket_p/Makefile.inc 1 file changed, 16 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/44220/1
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 76c4127..b644fce 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -1,16 +1,19 @@ -subdirs-y += ../model_6fx -subdirs-y += ../model_1067x -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../hyperthreading -subdirs-y += ../speedstep - -bootblock-y += ../car/core2/cache_as_ram.S bootblock-y += ../car/bootblock.c -postcar-y += ../car/p4-netburst/exit_car.S +bootblock-y += ../car/core2/cache_as_ram.S
romstage-y += ../car/romstage.c + +postcar-y += ../car/p4-netburst/exit_car.S + +subdirs-y += ../model_6fx +subdirs-y += ../model_1067x + +subdirs-y += ../hyperthreading +subdirs-y += ../microcode +subdirs-y += ../speedstep +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/smm +subdirs-y += ../../x86/tsc +