Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30887 )
Change subject: util/inteltool: Add support for Denverton ......................................................................
Patch Set 9: Code-Review+2
(3 comments)
haha, was looking at a table with gaps in it. the register description seems comprehensive :) thanks for the tedious work!
https://review.coreboot.org/#/c/30887/8/util/inteltool/gpio.c File util/inteltool/gpio.c:
https://review.coreboot.org/#/c/30887/8/util/inteltool/gpio.c@1035 PS8, Line 1035: case PCI_DEVICE_ID_INTEL_DNV_LPC:
Done
Hmm, now it's amidst the Skylake ids... a matter of taste, I guess
https://review.coreboot.org/#/c/30887/9/util/inteltool/gpio_groups.c File util/inteltool/gpio_groups.c:
https://review.coreboot.org/#/c/30887/9/util/inteltool/gpio_groups.c@622 PS9, Line 622: static const char *const denverton_group_north_all_names[] = { I couldn't find any table with the native function names. I guess we can assume that all the pads that aren't simply named GPIOxx have the first native function as their name.
https://review.coreboot.org/#/c/30887/9/util/inteltool/gpio_groups.c@853 PS9, Line 853: return "RESERVED"; If you don't want to go through the hassle to specify the native function names explicitly, consider changing this to return a string "Native #%d" then you'd see the number in the output at least. Should be a separate commit, though.