[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/mtl: Enable RAMTOP caching at SoC level for MTL devices

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81271?usp=email )

Change subject: soc/intel/mtl: Enable RAMTOP caching at SoC level for MTL devices
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soc/intel/mtl: Enable RAMTOP caching at SoC level for MTL devices

This patch enables the `SOC_INTEL_COMMON_BASECODE_RAMTOP` configuration
at the SoC level for all MTL devices. This change streamlines the
configuration process, avoiding redundant selections on individual
mainboards.

BUG=b:306677879
BRANCH=firmware-rex-15709.B
TEST=Verified boot functionality on google/ovis and google/rex.

Change-Id: I3aa3a83c190d0a0e93c267222a9dca0ac7651f9c
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81271
Tested-by: build bot (Jenkins) 
Reviewed-by: Stefan Reinauer 
---
M src/mainboard/google/rex/Kconfig
M src/mainboard/intel/mtlrvp/Kconfig
M src/soc/intel/meteorlake/Kconfig
3 files changed, 1 insertion(+), 4 deletions(-)

Approvals:
  Stefan Reinauer: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig
index b162651..880680a 100644
--- a/src/mainboard/google/rex/Kconfig
+++ b/src/mainboard/google/rex/Kconfig
@@ -43,7 +43,6 @@
    select RT8168_GEN_ACPI_POWER_RESOURCE
    select RT8168_GET_MAC_FROM_VPD
    select RT8168_SET_LED_MODE
-	select SOC_INTEL_COMMON_BASECODE_RAMTOP
    select SOC_INTEL_IOE_DIE_SUPPORT
    select SOC_INTEL_METEORLAKE_U_H
    select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
@@ -59,7 +58,6 @@
    select HAVE_SLP_S0_GATE
    select MAINBOARD_HAS_CHROMEOS
    select MEMORY_SOLDERDOWN
-	select SOC_INTEL_COMMON_BASECODE_RAMTOP
    select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
    select SOC_INTEL_IOE_DIE_SUPPORT
    select SOC_INTEL_METEORLAKE_U_H
diff --git a/src/mainboard/intel/mtlrvp/Kconfig b/src/mainboard/intel/mtlrvp/Kconfig
index 440466b..36842b5 100644
--- a/src/mainboard/intel/mtlrvp/Kconfig
+++ b/src/mainboard/intel/mtlrvp/Kconfig
@@ -19,7 +19,6 @@
    select HAVE_ACPI_TABLES
    select HAVE_SPD_IN_CBFS
    select MAINBOARD_HAS_CHROMEOS
-	select SOC_INTEL_COMMON_BASECODE_RAMTOP
    select SOC_INTEL_COMMON_BLOCK_VARIANT_POWER_LIMIT
    select SOC_INTEL_CSE_LITE_SKU
    select SOC_INTEL_METEORLAKE_U_H
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 43bb25e..a4ebad4 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -84,7 +84,7 @@
    select SOC_INTEL_COMMON_BLOCK_XHCI
    select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
    select SOC_INTEL_COMMON_BASECODE
-	select SOC_INTEL_COMMON_BASECODE_RAMTOP if !MAINBOARD_HAS_CHROMEOS
+	select SOC_INTEL_COMMON_BASECODE_RAMTOP
    select SOC_INTEL_COMMON_FSP_RESET
    select SOC_INTEL_COMMON_PCH_CLIENT
    select SOC_INTEL_COMMON_RESET