[coreboot-gerrit] Change in coreboot[master]: vboot/Kconfig: Handle VBNV RTC offset in code

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38918 )

Change subject: vboot/Kconfig: Handle VBNV RTC offset in code
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Patch Set 2:

(1 comment)

File src/vendorcode/google/chromeos/acpi/chromeos.asl:

https://review.coreboot.org/c/coreboot/+/38918/comment/f7fd2563_723bc5e5 
PS2, Line 79: 			CONFIG_VBOOT_VBNV_OFFSET - 14,
> Looks like this code would be added even if !VBOOT_VBNV_CMOS. So if cros […]

I had to think twice about it to figure what my younger self meant here.
The problem is that if VBOOT_VBNV_CMOS is disabled, we had a 0 here. But
after this patch it would be an odd -14.

Maybe it's better to restart this work. First, figure out what this `14`
is about. Why is C code always using that offset but ASL isn't? It's all
not that easy with an unspecified ACPI API (or is it documented somewhere?).