[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add option to toggle Hyper-Threading

[Patrick Rudolph (Code Review)]

Patrick Rudolph has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35208 )

Change subject: soc/intel/skylake: Add option to toggle Hyper-Threading
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soc/intel/skylake: Add option to toggle Hyper-Threading

Tested on Supermicro X11SSH-TF.

Change-Id: I3ebab68ff868c78105bb4b35abffb92f3ccf1705
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35208
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/romstage/romstage_fsp20.c
2 files changed, 6 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Name of user not set #1002476: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9cb8d45..901e5f9 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -78,6 +78,11 @@
    select TSC_SYNC_MFENCE
    select UDELAY_TSC

+config FSP_HYPERTHREADING
+	bool "Enable Hyper-Threading"
+	depends on MAINBOARD_USES_FSP2_0
+	default y
+
 config CPU_INTEL_NUM_FIT_ENTRIES
    int
    default 10
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 002a284..deda533 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -252,6 +252,7 @@
    	m_cfg->PchHpetDeviceNumber = V_P2SB_HBDF_DEV;
    	m_cfg->PchHpetFunctionNumber = V_P2SB_HBDF_FUN;
    }
+	m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING);
 }

static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg,