Matt Papageorge has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43303 )
Change subject: soc/amd/common: Use SPI settings from EFS ......................................................................
Patch Set 11:
(4 comments)
https://review.coreboot.org/c/coreboot/+/43303/5/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb:
https://review.coreboot.org/c/coreboot/+/43303/5/src/mainboard/google/zork/v... PS5, Line 135: SPI_SPEED_66M
I'm all for deleting all this if EFS takes care of setting it up.
Done for the two fields being utilized. Furquan has suggested removing this entire thing as well and we should accomplish this in a future change.
https://review.coreboot.org/c/coreboot/+/43303/9/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb:
https://review.coreboot.org/c/coreboot/+/43303/9/src/mainboard/google/zork/v... PS9, Line 135: .altio_speed = SPI_SPEED_66M, /* MHz */ : .tpm_speed = SPI_SPEED_66M, /* MHz */
Can't we just drop these two entries from trembyle and dalboz devicetree? None of them are really us […]
Ack
https://review.coreboot.org/c/coreboot/+/43303/9/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/spi.h:
https://review.coreboot.org/c/coreboot/+/43303/9/src/soc/amd/common/block/in... PS9, Line 64: Read mode - Normal 33MHz
This needs to be dropped too.
Done
https://review.coreboot.org/c/coreboot/+/43303/9/src/soc/amd/common/block/sp... File src/soc/amd/common/block/spi/fch_spi.c:
https://review.coreboot.org/c/coreboot/+/43303/9/src/soc/amd/common/block/sp... PS9, Line 59: SPI_SPEED_16M, SPI_SPEED_16M
Thinking about this again. I don't think these really matter for em100. […]
Agreed