[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/timer: Add config to enable/disable PM timer s...

[Meera Ravindranath (Code Review)]

Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36034 )

Change subject: soc/intel/common/block/timer: Add config to enable/disable PM timer support
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Patch Set 16:
> Patch Set 16:
> > Patch Set 16: Code-Review-1
> >
> > Sorry for bringing this up so late in review. But I only now
> > understand the existing code better, at least I believe so.
> >
> > It seems this whole story is just a workaround for a bug
> > in coreboot. We don't have to enable the timer because we
> > have the emulated timer instead. The bug is that we don't
> > report the timer in ACPI, see CB:23510. I think all we need
> > is to apply that to the stale copies (cannonlake/ icelake/
> > tigerlake/).
>
> Agree, Thanks for sharing CB:23510, we can port it for cnl/icl/tgl
> and check for tianocore boot support.

Agreed. Thanks Nico for sharing  CB:23510. Ported the changes to icl,cnl,tgl in https://review.coreboot.org/c/coreboot/+/37662. Kindly review.