[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Remove UDELAY_LAPIC_FIXED_FSB

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36526 )

Change subject: soc/amd/stoneyridge: Remove UDELAY_LAPIC_FIXED_FSB
......................................................................

soc/amd/stoneyridge: Remove UDELAY_LAPIC_FIXED_FSB

We only need this defined with udelay() implementation
on top of LAPIC_MONOTONIC_TIMER.

Change-Id: I490245fa0d57de3a6e8609e735f668626cf1201e
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36526
Reviewed-by: Marshall Dawson 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/stoneyridge/Kconfig
1 file changed, 0 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 72719d7..0e55937 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -86,10 +86,6 @@
    select VBOOT_VBNV_CMOS
    select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH

-config UDELAY_LAPIC_FIXED_FSB
-	int
-	default 200
-
 # TODO: Sync these with definitions in PI vendorcode.
 # DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
 # DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.