Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35228 )
Change subject: src/soc/intel/{common,cnl,skl,icl}: Move global reset req function to common ......................................................................
Patch Set 25:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35228/25/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/35228/25/src/soc/intel/common/block... PS25, Line 83: /* HECI Message Header */ : struct mkhi_hdr { : uint8_t group_id; : uint8_t command:7; : uint8_t is_resp:1; : uint8_t rsvd; : uint8_t result; : } __packed;
If this is common across SoCs and has the same format, why not get rid of various definitions of thi […]
will be done as part of https://review.coreboot.org/c/coreboot/+/35545
https://review.coreboot.org/c/coreboot/+/35228/25/src/soc/intel/common/block... PS25, Line 577: The reset type can be GLOBAL_RESET/ : * HOST_RESET_ONLY/CSE_RESET_ONLY.
How do those versions translate to the different platforms here?
TXE is for small core and 4.0 is in APL/GLK ME xx series is for big core, e.g, SKL/KBL - 11.0, CNL - 12.0, ICL - 13.0, CML - 14.0, and so on.
https://review.coreboot.org/c/coreboot/+/35228/25/src/soc/intel/common/block... PS25, Line 609: if (rst_type == CSE_RESET_ONLY)
How does the host know that CSE_RESET request was accepted? How does it know when the reset was comp […]
correct, that is what I meant by "Need to to check if there is something in HFSTS registers which we can use to know that CSE is being reset and don't have to wait." Skip waiting part if we know that CSE is being reset.