Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47852 )
Change subject: lenovo/g505s: properly program the IRQ tables ......................................................................
Patch Set 5:
(2 comments)
Patch Set 4:
Today I tried using the results obtained by this cycle (see below) - that's what the "dynamic generation" would've given me - and have updated all the IRQ tables & routing accordingly. However, despite my best efforts, a laptop is running super slow (plagued by bad IRQs?) and doesn't detect SATA at all. I am really disappointed and don't know how to proceed further 😞
struct device *dev; int num_devs = 0;
for (dev = pcidev_on_root(0, 0); dev; dev = dev->sibling) { u8 pci_dev; u8 int_pin;
pci_dev = PCI_SLOT(dev->path.pci.devfn); int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); if (int_pin == PIRQ_NC || int_pin > PIRQ_D) continue; printk(BIOS_INFO, "ACPI_PIRQ_GEN: %s: int_pin=%d int_pin-pirq_a=%d\n", dev_path(dev), int_pin, int_pin - PIRQ_A); num_devs++;}
ACPI_PIRQ_GEN: PCI: 00:00.0: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:00.2: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:01.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:01.1: int_pin=2 int_pin-pirq_a=2 ACPI_PIRQ_GEN: PCI: 00:02.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:04.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:05.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:11.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:12.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:12.2: int_pin=2 int_pin-pirq_a=2 ACPI_PIRQ_GEN: PCI: 00:13.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:13.2: int_pin=2 int_pin-pirq_a=2 ACPI_PIRQ_GEN: PCI: 00:14.0: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:14.2: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:14.3: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:14.4: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:14.5: int_pin=3 int_pin-pirq_a=3 ACPI_PIRQ_GEN: PCI: 00:16.0: int_pin=1 int_pin-pirq_a=1 ACPI_PIRQ_GEN: PCI: 00:16.2: int_pin=2 int_pin-pirq_a=2 ACPI_PIRQ_GEN: PCI: 00:18.0: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:18.1: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:18.2: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:18.3: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:18.4: int_pin=0 int_pin-pirq_a=0 ACPI_PIRQ_GEN: PCI: 00:18.5: int_pin=0 int_pin-pirq_a=0
Not sure what you're trying to do here.
What you want to is get the INT pin from PCI config and look that up in the 0xC00 IO config space. (This is sort of the equivalent of what Intel has in RCBA, see southbridge/intel/common/rcba_pirq.c)
https://review.coreboot.org/c/coreboot/+/47852/4/src/mainboard/lenovo/g505s/... File src/mainboard/lenovo/g505s/acpi/routing.asl:
https://review.coreboot.org/c/coreboot/+/47852/4/src/mainboard/lenovo/g505s/... PS4, Line 7: IOMMU: 0:02.00
Do you think there are no reasons for giving the IRQ to IOMMU device?
No. the IOMMU is PCI 00:00.2 not 00:02.0
https://review.coreboot.org/c/coreboot/+/47852/4/src/mainboard/lenovo/g505s/... PS4, Line 66: IRQ 3
Should I remove this "IOMMU routing"?
No, this routing table uses APIC interrupts not legacy PIC interrupts so this comment is wrong. You can see that IRQ 16-19 is used this PCI device, not 3