Attention is currently required from: Raul Rangel, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58638 )
Change subject: mb/google/guybrush: Move GSC_SOC_INT_L from GPIO_3 to GPIO_85 ......................................................................
Patch Set 1:
(2 comments)
File src/mainboard/google/guybrush/variants/guybrush/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/58638/comment/a9460f37_ffc079e8 PS1, Line 162: e
Do we need to specify the alias again?
We dont need to specify alias again. Actually it led to devicetree compilation error.
File src/mainboard/google/guybrush/variants/nipperkin/gpio.c:
https://review.coreboot.org/c/coreboot/+/58638/comment/9aeae9cd_59b4a960 PS1, Line 40: BID == 1: GSC_SOC_INT_L, BID > 1: Unused
Should we have an early_bid1 table?
These GPIOs are set up in verstage before ESPI is setup. Hence we cannot use board version to select the table in verstage. Rather we configure all the GPIOs in verstage and then when we jump to bootblock we update the configuration.