[coreboot-gerrit] Change in ...coreboot[master]: southbridge/intel/common/smbus.c: Add support for i2c block write

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30800 )

Change subject: southbridge/intel/common/smbus.c: Add support for i2c block write
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Patch Set 17:

(1 comment)

https://review.coreboot.org/#/c/30800/9/src/southbridge/intel/common/smbus.c 
File src/southbridge/intel/common/smbus.c:

https://review.coreboot.org/#/c/30800/9/src/southbridge/intel/common/smbus.c... 
PS9, Line 453: 	outb(cmd, smbus_base + SMBHSTDAT1);
> 'cmd' is the 'offset'. For the i2c this is the higher past of the 16-byte address.

You mean a 16-bit address? but where is the lower part?