Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45796 )
Change subject: soc/intel: Make use of PMC low power program from common block
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45796/3/src/soc/intel/cannonlake/fi...
File src/soc/intel/cannonlake/finalize.c:
https://review.coreboot.org/c/coreboot/+/45796/3/src/soc/intel/cannonlake/fi...
PS3, Line 43: static void pch_finalize(void)
We used all of this "cannonlake" code actually supports whiskey lake, coffee lake, and comet lake as […]
Yes, looking at https://review.coreboot.org/c/coreboot/+/37604 it appears to be CML changes rather CNL hence might be required and this register is not common for all chipset hence not a good idea to move into pmclib 😞
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