Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8635
-gerrit
commit 52b5723f61a9269f55768bea4fb0adf321bddbd8 Author: Aaron Durbin adurbin@chromium.org Date: Tue Mar 10 11:45:25 2015 -0500
coreboot: x86: enable gc-sections
Garbage collected sections allow for trimming the size of the binaries as well as allowing for not needing to config off unused functions. To that end, on a rambi build the following differences are observed:
$ diff -up \ <(readelf -l coreboot-builds/google_rambi/cbfs/fallback/ramstage.elf) \ <(readelf -l coreboot-builds/google_rambi_gc_sections/cbfs/fallback/ramstage.elf) --- /dev/fd/63 2015-03-10 12:07:27.927985430 -0500 +++ /dev/fd/62 2015-03-10 12:07:27.927985430 -0500 @@ -6,9 +6,9 @@ There are 4 program headers, starting at Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00000000 0x00000000 0x00040 0x00040 RWE 0 - LOAD 0x001040 0x00000040 0x00000040 0x34560 0x34560 RWE 0 - LOAD 0x0355a0 0x000345a0 0x000345a0 0x02578 0x02578 RWE 0 - LOAD 0x037b18 0x00036b18 0x00036b18 0x00000 0x0b560 0 + LOAD 0x001040 0x00000040 0x00000040 0x2cbf8 0x2cbf8 RWE 0 + LOAD 0x02dc38 0x0002cc38 0x0002cc38 0x02208 0x02208 RWE 0 + LOAD 0x02fe40 0x0002ee40 0x0002ee40 0x00000 0x0a888 0
Section to Segment mapping: Segment Sections...
$ diff -up \ <(readelf -l coreboot-builds/google_rambi/cbfs/fallback/romstage.elf) \ <(readelf -l coreboot-builds/google_rambi_gc_sections/cbfs/fallback/romstage.elf) --- /dev/fd/63 2015-03-10 12:08:16.855985880 -0500 +++ /dev/fd/62 2015-03-10 12:08:16.851985880 -0500 @@ -5,8 +5,8 @@ There are 1 program headers, starting at
Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align - LOAD 0x000060 0xfff20000 0xfff20000 0x08b81 0x08b81 R E 0x10 + LOAD 0x000060 0xfff20000 0xfff20000 0x06300 0x06300 R E 0x10
Section to Segment mapping: Segment Sections... - 00 .rom .text + 00 .rom
The following warnings needed to be applied to CFLAGS_common because for some reason gcc was miraculously emitting the warnings with the unrelated *-sections options: -Wno-unused-but-set-variable
Change-Id: I210784fdfc273ce4cb9927352cbd5a51be3c6929 Signed-off-by: Aaron Durbin adurbin@chromium.org --- Makefile.inc | 2 +- src/arch/x86/Makefile.inc | 8 ++------ src/arch/x86/init/romstage.ld | 7 +++++-- src/arch/x86/ramstage.ld | 11 +++++++---- src/lib/Makefile.inc | 2 +- src/lib/rmodule.ld | 10 ++++++---- toolchain.inc | 2 ++ 7 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/Makefile.inc b/Makefile.inc index 656d988..4e435bc 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -253,7 +253,7 @@ CPPFLAGS_common += -include $(src)/include/kconfig.h CFLAGS_common += -pipe -g -nostdinc CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -CFLAGS_common += -Wstrict-aliasing -Wshadow +CFLAGS_common += -Wstrict-aliasing -Wshadow -Wno-unused-but-set-variable ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) CFLAGS_common += -Werror endif diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index a92c55c..7acdb57 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -27,11 +27,7 @@ subdirs-y += boot subdirs-y += lib subdirs-y += smp
-ifeq ($(CONFIG_COMPILER_GCC),y) -DISASSEMBLY=-Wa,-acdlns -else DISASSEMBLY=-Wa,--divide -endif
OPTION_TABLE_H:= ifeq ($(CONFIG_HAVE_OPTION_TABLE),y) @@ -214,7 +210,7 @@ $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.
$(objcbfs)/romstage.debug: $$(romstage-objs) $(objgenerated)/romstage.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" - $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(COMPILER_RT_FLAGS_romstage) --start-group $(romstage-objs) $(romstage-libs) $(COMPILER_RT_romstage) --end-group -T $(objgenerated)/romstage.ld + $(LD_romstage) --gc-sections -nostdlib -nostartfiles -static -o $@ -L$(obj) $(COMPILER_RT_FLAGS_romstage) --start-group $(romstage-objs) $(romstage-libs) $(COMPILER_RT_romstage) --end-group -T $(objgenerated)/romstage.ld
$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @printf " GEN $(subst $(obj)/,,$(@))\n" @@ -310,7 +306,7 @@ else
$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" - $(LD_ramstage) -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld + $(LD_ramstage) --gc-sections -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld
endif
diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld index 50eb4ab..95b9571 100644 --- a/src/arch/x86/init/romstage.ld +++ b/src/arch/x86/init/romstage.ld @@ -30,13 +30,16 @@ SECTIONS .rom . : { _rom = .; *(.rom.text); + *(.rom.text.*); + *(.text); + *(.text.*); *(.rom.data); *(.rodata); *(.rodata.*); *(.rom.data.*); . = ALIGN(16); _car_migrate_start = .; - *(.car.migrate); + KEEP(*(.car.migrate)); LONG(0); _car_migrate_end = .; . = ALIGN(16); @@ -73,7 +76,7 @@ SECTIONS . = 0xffffff00; .illegal_globals . : { *(EXCLUDE_FILE (*/libagesa.*.a: */buildOpts.romstage.o */agesawrapper.romstage.o */vendorcode/amd/agesa/* */vendorcode/amd/cimx/*) .data) - *(.data.*) + *(EXCLUDE_FILE (*/libagesa.*.a: */buildOpts.romstage.o */agesawrapper.romstage.o */vendorcode/amd/agesa/* */vendorcode/amd/cimx/*) .data.*) *(.bss) *(.bss.*) *(.sbss) diff --git a/src/arch/x86/ramstage.ld b/src/arch/x86/ramstage.ld index 1c8e8dc..0843be7 100644 --- a/src/arch/x86/ramstage.ld +++ b/src/arch/x86/ramstage.ld @@ -42,7 +42,7 @@ SECTIONS .ctors : { . = ALIGN(0x100); __CTOR_LIST__ = .; - *(.ctors); + KEEP(*(.ctors)); LONG(0); __CTOR_END__ = .; } @@ -55,13 +55,13 @@ SECTIONS * section names the equivalent changes need to made to * rmodule.ld. */ pci_drivers = . ; - *(.rodata.pci_driver) + KEEP(*(.rodata.pci_driver)); epci_drivers = . ; cpu_drivers = . ; - *(.rodata.cpu_driver) + KEEP(*(.rodata.cpu_driver)); ecpu_drivers = . ; _bs_init_begin = .; - *(.bs_init) + KEEP(*(.bs_init)); _bs_init_end = .;
*(.rodata) @@ -82,6 +82,7 @@ SECTIONS .data : { _data = .; *(.data) + *(.data.*) _edata = .; }
@@ -92,7 +93,9 @@ SECTIONS _bss = .; .bss . : { *(.bss) + *(.bss.*) *(.sbss) + *(.sbss.*) *(COMMON) } _ebss = .; diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index d5ba8e4..72b4c68 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -125,7 +125,7 @@ ramstage-y += rmodule.c romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += rmodule.c
RMODULE_LDSCRIPT := $(src)/lib/rmodule.ld -RMODULE_LDFLAGS := -nostartfiles --emit-relocs -z defs -Bsymbolic -T$(RMODULE_LDSCRIPT) +RMODULE_LDFLAGS := -nostartfiles --gc-sections --emit-relocs -z defs -Bsymbolic -T$(RMODULE_LDSCRIPT)
# rmodule_link_rules is a function that should be called with: # (1) the object name to link diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld index f3e7cba..c1669be 100644 --- a/src/lib/rmodule.ld +++ b/src/lib/rmodule.ld @@ -14,6 +14,8 @@
BASE_ADDRESS = 0x00000;
+ENTRY(__rmodule_entry); + SECTIONS { . = BASE_ADDRESS; @@ -38,15 +40,15 @@ SECTIONS * ramstage.ld should be made here as well. */ . = ALIGN(8); pci_drivers = . ; - *(.rodata.pci_driver) + KEEP(*(.rodata.pci_driver)); epci_drivers = . ; . = ALIGN(8); cpu_drivers = . ; - *(.rodata.cpu_driver) + KEEP(*(.rodata.cpu_driver)); ecpu_drivers = . ; . = ALIGN(8); _bs_init_begin = .; - *(.bs_init) + KEEP(*(.bs_init)); _bs_init_end = .;
. = ALIGN(8); @@ -59,7 +61,7 @@ SECTIONS * to a module, however there has to be an prior agreement * on how to interpret the parameters. */ _module_params_begin = .; - *(.module_parameters); + KEEP(*(.module_parameters)); _module_params_end = .; . = ALIGN(8);
diff --git a/toolchain.inc b/toolchain.inc index f888d68..8241e25 100644 --- a/toolchain.inc +++ b/toolchain.inc @@ -66,6 +66,8 @@ CFLAGS_arm64 := -ffunction-sections -fdata-sections
CFLAGS_mipsel := -mips32r2 -G 0
+CFLAGS_x86_32 := -ffunction-sections -fdata-sections + toolchain_to_dir = \ $(foreach arch,$(ARCH_SUPPORTED),\ $(eval CPPFLAGS_$(arch) += \