Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32076 )
Change subject: mb/protectli/vault: Add FW2B and FW4B Braswell based boards support ......................................................................
Patch Set 15:
(3 comments)
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... PS15, Line 12: register "PcdIgdDvmt50PreAlloc" = "1"
Might use IDG_MEMSIZE_32MB
Grepped the whole project directory looking for this string and found nothing. How may I use it?
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... PS15, Line 19: #include "onboard.h"
Is onboard. […]
It is for SDCARD_CD in soc/acpi. Otherwise it does not compile.I had to move it here, because I was asked to remove it from one of mainboard/acpi files.
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/romstage.c:
https://review.coreboot.org/c/coreboot/+/32076/15/src/mainboard/protectli/va... PS15, Line 23: ite_enable_serial(SERIAL1_DEV, CONFIG_TTYS0_BASE);
ite_enable_serial() is done in early stage. Required to re-enable again? […]
And that is why superio serial stops working. Enabling it right after memory init prevents losing debug prints.