[coreboot-gerrit] Change in coreboot[master]: soc/sifive/fu540: Simplify UART refclk calculation

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/29334

Change subject: soc/sifive/fu540: Simplify UART refclk calculation
......................................................................

soc/sifive/fu540: Simplify UART refclk calculation

clock_get_coreclk_khz() already detects whether the PLL or the input
clock (hfclk) is used.

Tested on HiFive Unleashed.

Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b
Signed-off-by: Jonathan Neuschäfer 
---
M src/soc/sifive/fu540/Makefile.inc
M src/soc/sifive/fu540/clock.c
M src/soc/sifive/fu540/uart.c
3 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/29334/1

diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc
index e2bdd03..d9bcb2c 100644
--- a/src/soc/sifive/fu540/Makefile.inc
+++ b/src/soc/sifive/fu540/Makefile.inc
@@ -17,6 +17,7 @@
 bootblock-y += clint.c
 bootblock-y += media.c
 bootblock-y += bootblock.c
+bootblock-y += clock.c

romstage-y += uart.c
 romstage-y += media.c
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c
index 20dce23..a8b61f1 100644
--- a/src/soc/sifive/fu540/clock.c
+++ b/src/soc/sifive/fu540/clock.c
@@ -242,6 +242,7 @@
 }
 #endif /* ENV_ROMSTAGE */

+/* Get the core clock's frequency, in KHz */
 int clock_get_coreclk_khz(void)
 {
    if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK)
diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c
index b563be1..454b13d 100644
--- a/src/soc/sifive/fu540/uart.c
+++ b/src/soc/sifive/fu540/uart.c
@@ -30,11 +30,8 @@
 unsigned int uart_platform_refclk(void)
 {
    /*
-	 * The SiFive UART uses tlclk, which is coreclk/2 as input
+	 * The SiFive UART uses tlclk, which is coreclk/2, as input
     */

-	if (ENV_BOOTBLOCK)
-		return 33330000 / 2;
-	else
-		return clock_get_coreclk_khz() * KHz / 2;
+	return clock_get_coreclk_khz() * KHz / 2;
 }