[coreboot-gerrit] [S] Change in coreboot[master]: soc/cavium/cn81xx: Use read64p()

[Elyes Haouas (Code Review)]

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70284 )

Change subject: soc/cavium/cn81xx: Use read64p()
......................................................................

soc/cavium/cn81xx: Use read64p()

Change-Id: Ia79816ccc230d17dd1ce2bde7a185b4d502ad107
Signed-off-by: Elyes Haouas 
---
M src/soc/cavium/cn81xx/clock.c
M src/soc/cavium/cn81xx/cpu.c
2 files changed, 15 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/70284/1

diff --git a/src/soc/cavium/cn81xx/clock.c b/src/soc/cavium/cn81xx/clock.c
index e415a85..0aafefc 100644
--- a/src/soc/cavium/cn81xx/clock.c
+++ b/src/soc/cavium/cn81xx/clock.c
@@ -46,7 +46,7 @@
 {
    union cavm_rst_boot rst_boot;

-	rst_boot.u = read64((void *)RST_PF_BAR0);
+	rst_boot.u = read64p(RST_PF_BAR0);

return ((u64)rst_boot.s.pnr_mul) * PLL_REF_CLK;
 }
@@ -58,7 +58,7 @@
 {
    union cavm_rst_boot rst_boot;

-	rst_boot.u = read64((void *)RST_PF_BAR0);
+	rst_boot.u = read64p(RST_PF_BAR0);

return ((u64)rst_boot.s.c_mul) * PLL_REF_CLK;
 }
diff --git a/src/soc/cavium/cn81xx/cpu.c b/src/soc/cavium/cn81xx/cpu.c
index bb85029..14aff58 100644
--- a/src/soc/cavium/cn81xx/cpu.c
+++ b/src/soc/cavium/cn81xx/cpu.c
@@ -11,7 +11,7 @@

uint64_t cpu_get_available_core_mask(void)
 {
-	return read64((void *)RST_PP_AVAILABLE);
+	return read64p(RST_PP_AVAILABLE);
 }

size_t cpu_get_num_available_cores(void)
@@ -75,7 +75,7 @@
    write64((void *)MIO_BOOT_AP_JUMP, (uintptr_t)secondary_init);

/* Get coremask of cores in reset */
-	const uint64_t reset = read64((void *)RST_PP_RESET);
+	const uint64_t reset = read64p(RST_PP_RESET);
    printk(BIOS_INFO, "CPU: Cores currently in reset: 0x%llx\n", reset);

/* Setup entry for secondary core */
@@ -93,7 +93,7 @@

stopwatch_init_usecs_expire(&sw, 1000000);
    do {
-		pending = read64((void *)RST_PP_PENDING);
+		pending = read64p(RST_PP_PENDING);
    } while (!stopwatch_expired(&sw) && (pending & coremask));

if (stopwatch_expired(&sw)) {