[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/common: Add Panther Lake DTT support

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86118?usp=email )

Change subject: soc/intel/common: Add Panther Lake DTT support
......................................................................

soc/intel/common: Add Panther Lake DTT support

This commit adds the Panther Lake Intel Dynamic Tuning
Technology (Intel DTT) PCI Device ID to the list of supported devices
in the ACPI Common Block DTT driver.

The Panther Lake Intel DTT PCI ID is defined in document #815002,
"Panther Lake U/H Processor - External Design Specification - Volume
1".

TEST=The SSDT ACPI table includes the DPTF device definition on
     fatcat board.

Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8
Signed-off-by: Jeremy Compostella 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86118
Tested-by: build bot (Jenkins) 
Reviewed-by: Bora Guvendik 
Reviewed-by: Jamie Ryu 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/dtt/dtt.c
2 files changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Jamie Ryu: Looks good to me, approved
  Bora Guvendik: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index c882fdc..d17dca4 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4854,6 +4854,7 @@
 #define PCI_DID_INTEL_ADL_DTT			0x461d
 #define PCI_DID_INTEL_MTL_DTT			0x7d03
 #define PCI_DID_INTEL_RPL_DTT			0xa71d
+#define PCI_DID_INTEL_PTL_DTT			0xb01d

/* Intel CNVi WiFi/BT device IDs */
 #define PCI_DID_INTEL_CML_LP_CNVI_WIFI		0x02f0
diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c
index 1d70335..8b086e0 100644
--- a/src/soc/intel/common/block/dtt/dtt.c
+++ b/src/soc/intel/common/block/dtt/dtt.c
@@ -8,6 +8,7 @@
 #include <intelblocks/acpi.h>

static const unsigned short pci_device_ids[] = {
+	PCI_DID_INTEL_PTL_DTT,
    PCI_DID_INTEL_RPL_DTT,
    PCI_DID_INTEL_MTL_DTT,
    PCI_DID_INTEL_CML_DTT,