[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Initialize FPMCU_PCH_BOOT1

[Shelley Chen (Code Review)]

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35845 )

Change subject: mb/google/hatch: Initialize FPMCU_PCH_BOOT1
......................................................................

mb/google/hatch: Initialize FPMCU_PCH_BOOT1

FPMCU_PCH_BOOT1 pin is connected to GPP_C12. So, config GPP_C12.

BUG=b:142188003
TEST=emerge-hatch coreboot

Change-Id: I73a5c3529330ef3e72f4c7d5fcbbd2f6693494d8
Signed-off-by: Wisley Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35845
Reviewed-by: Paul Fagerburg 
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/hatch/variants/dratini/gpio.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Paul Fagerburg: Looks good to me, approved

diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c
index 003b7d1..30d56d7 100644
--- a/src/mainboard/google/hatch/variants/dratini/gpio.c
+++ b/src/mainboard/google/hatch/variants/dratini/gpio.c
@@ -31,6 +31,8 @@
    PAD_NC(GPP_A18, NONE),
    /* A19 : NC */
    PAD_NC(GPP_A19, NONE),
+	/* C12 : FPMCU_PCH_BOOT1 */
+	PAD_CFG_GPO(GPP_C12, 0, DEEP),
    /* C15 : NC */
    PAD_NC(GPP_C15, NONE),
    /* F1  : NC */