[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Set controller state to active in GSPI init

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34449 )

Change subject: soc/intel/common: Set controller state to active in GSPI init
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34449/1/src/soc/intel/common/block/... 
File src/soc/intel/common/block/gspi/gspi.c:

https://review.coreboot.org/c/coreboot/+/34449/1/src/soc/intel/common/block/... 
PS1, Line 179:
> yes,here we are just setting the BAR and not doing a controller init/setup.

true but point is that if ctrl itself in D3 then what we will achieve by reading BAR and programming that BAR ?
Shouldn't we ensure to make controller into D0 and set BAR.

i believe this early BAR programming is required for TPM. We might see TPM communication error if ctrl remains in D3 for *any* reason (although i don't see that reason so far)