John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40968 )
Change subject: soc/intel/tigerlake: Clear TBT PCIe root ports BME at exit boot service ......................................................................
Patch Set 6:
(3 comments)
https://review.coreboot.org/c/coreboot/+/40968/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40968/6//COMMIT_MSG@11 PS6, Line 11: exit boot service
What is that in coreboot terms?
It would be equivalent to coreboot's END_OF_FIRMWARE boot state.
https://review.coreboot.org/c/coreboot/+/40968/6/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chip.c:
https://review.coreboot.org/c/coreboot/+/40968/6/src/soc/intel/tigerlake/chi... PS6, Line 119: , uint16_t device_id
Hm unless this was a check to see if the device isn't disabled? if so can you add a comment?
coreboot will be updated to check both dev and its device ID match before invoking the above pci_dev_disable_bus_master().
https://review.coreboot.org/c/coreboot/+/40968/6/src/soc/intel/tigerlake/chi... PS6, Line 134: platform_fsp_notify_status
Why is it implemted here? Does FSP require BME to be cleared?
FSP is typically driven by coreboot. END_OF_FIRMWARE is a later boot stage where it is proper to disable bus master.