[coreboot-gerrit] Patch set updated for coreboot: [WIP] spike-riscv: Register RAM resource at 0x80000000

[Ronald G. Minnich]

Ronald G. Minnich ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15511

-gerrit

commit 2808a4aa0d685bc790fe78e832e8ca0fd65057b3
Author: Jonathan Neuschäfer 
Date:   Wed Jun 29 21:59:32 2016 +0200

[WIP] spike-riscv: Register RAM resource at 0x80000000

Without this patch, the CBFS loader won't load segments into the RAM.

Change-Id: If05c8edb51f9fe2f7af84178826f93b193cfd8a9
    Signed-off-by: Jonathan Neuschäfer 
---
 src/mainboard/emulation/spike-riscv/mainboard.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/emulation/spike-riscv/mainboard.c b/src/mainboard/emulation/spike-riscv/mainboard.c
index 111e9b1..5a481f3 100644
--- a/src/mainboard/emulation/spike-riscv/mainboard.c
+++ b/src/mainboard/emulation/spike-riscv/mainboard.c
@@ -19,13 +19,22 @@

static void mainboard_enable(device_t dev)
 {
+	/*
+	 * Size of the emulated system RAM. On hardware, this would be external
+	 * DDR memory.
+	 *
+	 * TODO: Get this size from the hardware-supplied configuration string.
+	 */
+	const size_t ram_size = 1*GiB;

if (!dev) {
    	printk(BIOS_EMERG, "No dev0; die\n");
    	while (1);
    }

-	ram_resource(dev, 0, 2048, 32768);
+	/* TODO: move to src/arch/riscv? */
+	ram_resource(dev, 0, 0x80000000/KiB, ram_size/KiB);
+
    cbmem_recovery(0);
 }