[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint/smihandler.c: Remove dead assignment

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44288 )

Change subject: sb/intel/lynxpoint/smihandler.c: Remove dead assignment
......................................................................

sb/intel/lynxpoint/smihandler.c: Remove dead assignment

Change-Id: Icaae8a986cd375e2b67f05883688847e1a174082
Signed-off-by: Elyes HAOUAS 
---
M src/southbridge/intel/lynxpoint/smihandler.c
1 file changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/44288/1

diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index e4ebffd..bb05f99 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -427,7 +427,7 @@
 {
 #define IOTRAP(x) (trap_sts & (1 << x))
    u32 trap_sts, trap_cycle;
-	u32 data, mask = 0;
+	u32 mask = 0;
    int i;

trap_sts = RCBA32(0x1e00); // TRSR - Trap Status Register
@@ -454,8 +454,9 @@
    if (IOTRAP(0)) {
    	if (!(trap_cycle & (1 << 24))) { // It's a write
    		printk(BIOS_DEBUG, "SMI1 command\n");
-			data = RCBA32(0x1e18);
-			data &= mask;
+			(void)RCBA32(0x1e18);
+			// data = RCBA32(0x1e18);
+			// data &= mask;
    		// if (smi1)
    		//	southbridge_smi_command(data);
    		// return;
@@ -474,8 +475,7 @@

if (!(trap_cycle & (1 << 24))) {
    	/* Write Cycle */
-		data = RCBA32(0x1e18);
-		printk(BIOS_DEBUG, "  iotrap written data = 0x%08x\n", data);
+		printk(BIOS_DEBUG, "  iotrap written data = 0x%08x\n", RCBA32(0x1e18));
    }
 #undef IOTRAP
 }