[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Add dram control register define and bits define

[Xi Chen (Code Review)]

Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44699 )

Change subject: soc/mediatek/mt8192: Add dram control register define and bits define
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Patch Set 18:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... 
File src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h:

https://review.coreboot.org/c/coreboot/+/44699/6/src/soc/mediatek/mt8192/inc... 
PS6, Line 128: 	DQS_8PH_DEGREE_45,
> Ack

seems that it can't sorted, because the Phase Detect sequence is 0/180/45.