[coreboot-gerrit] Change in coreboot[master]: Revert "Revert "mb/google/volteer: Enable PCIEXP_HOTPLUG for TCSS TBT...

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41468 )

Change subject: Revert "Revert "mb/google/volteer: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 ports""
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Revert "Revert "mb/google/volteer: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 ports""

This reverts commit 1726fa1f0ce474cde32e8b32be34a212aff3ffba.

Reason for revert: Resource allocator is split into old(v3) and
new(v4). So, this change to enable hotplug resource allocator for
volteer can land back.

BUG=b:149186922

Change-Id: Ib6a4df610b045fbc885c70bff3698a032b79f770
Signed-off-by: Furquan Shaikh 
---
M src/mainboard/google/volteer/Kconfig
1 file changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/41468/1

diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig
index de77633..6875963 100644
--- a/src/mainboard/google/volteer/Kconfig
+++ b/src/mainboard/google/volteer/Kconfig
@@ -15,6 +15,7 @@
    select MAINBOARD_HAS_CHROMEOS
    select MAINBOARD_HAS_SPI_TPM_CR50
    select MAINBOARD_HAS_TPM2
+	select PCIEXP_HOTPLUG
    select SOC_INTEL_TIGERLAKE

if BOARD_GOOGLE_BASEBOARD_VOLTEER
@@ -66,6 +67,20 @@
    int
    default 8

+# Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569)
+# Revision 0.7.6 Section 7.2.5.1.5
+config PCIEXP_HOTPLUG_BUSES
+	int
+	default 42
+
+config PCIEXP_HOTPLUG_MEM
+	hex
+	default 0xc200000  # 194 MiB
+
+config PCIEXP_HOTPLUG_PREFETCH_MEM
+	hex
+	default 0x1c000000 # 448 MiB
+
 config TPM_TIS_ACPI_INTERRUPT
    int
    default 21  # GPE0_DW0_21 (GPP_C21)